Routing Congestion in VLSI Circuits: Estimation and Optimization
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Author
Edition
1st. ed.
Publisher
ISBN
9788184893885
Length
262p.,
Subjects
With the dramatic increase in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intelligent allocation of the available interconnect resources, up-front planning of the wire routes for even wire distributions, and transformations that make the physical ...
