Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based self-testing techniques, which usually have a non-trivial impact on a cicuit’s performance, size and power, cannot be applied without serious consideration and careful incorporation into the processor design.
Embedded Processor-Based Self-Test shows how the powerful embedded functionality that processors offer can be utilized as a self-testing resource. Through a discussion of different strategies the book emphasizes on the emerging area of Software-Based Self-Testing (SBST). SBST is based on the idea of execution of embedded software programs to perform self-testing of the processor itself and its surrounding blocks in the SoC. SBST is a low-cost strategy in terms of overhead (area, speed, power), development effort and test application cost, as it is applied using low-cost, low-speed test equipment.
Embedded Processor-Based Self-Test can be used by designers, DfT engineers, test practitioners, researchers and students working on digital testing, and in particular processor and SoC test. This book sets the framework for comparisons among different SBST methodologies by discussing key requirements. It presents successful applications of SBST to a number of embedded processors of different complexities and instruction set architectures.
ABOUT THE AUTHOR Antonis Paschalis
Antonis Paschalis is an Associate Professor at the Department of Informatics and Telecommunications, University of Athens, Greece. Previously, he was Senior Researcher at the Institute of Informatics and Telecommunications of the National Research Centre ``Demokritos`` in Athens. He holds a B.Sc. degree in Physics, a M.Sc. degree in Electronics and Computers, and a Ph.D. degree in Computers, all from University of Athens. His current research interests are logic design and architecture, VLSI testing, processor testing and hardware fault-tolerance. He has published over 100 papers and holds a US patent. He is a member of the editorial board of JETTA and has served the test community as vice chair of the Communications Group of the IEEE Computer Society TTTC and participating in several organizing and program committees of international events in the area of design and test.
ABOUT THE AUTHOR Dimitris Gizopoulos
Dimitris Gizopoulos is an Assistant Professor at the Department of Informatics, University of Piraeus, Greece. His research interests include processor testing, design-for-testability, self-testing, on-line testing and fault tolerance of digital circuits. Gizopoulos received the Computer Engineering degree from the University of Patras, Greece and a PhD from the University of Athens, Greece. He is author of more than sixty technical papers in transactions, journals, books and conferences and co-inventor of a US patent. He is member of the editorial board of IEEE Design & Test of Computers Magazine, and guest editor of special issues in IEEE publications. He is a member of the Steering, Organizing and Program Committees of several test technology technical events, member of the Executive Committee of the IEEE Computer Society Test Technology Technical Council (TTTC), a Senior Member of the IEEE and a Golden Core Member of the IEEE Computer Society.
ABOUT THE AUTHOR Yervant Zorian
Yervant Zorian is the Vice President and Chief Scientist of Virage Logic Corp. Previously he was the Chief Technology Advisor of Logic Vision Inc. and a Distinguished Member of Technical Staff at AT&T Bell Laboratories. Zorian received the MSc degree in Computer Engineering from the University of Southern California and a PhD in electrical engineering from McGill University. He also holds an executive MBA from Warthon School of Business, University of Pennsilvenia. He is the author of over 200 technical papers and three books, has received several best paper awards and holds twelve U.S. patents. Zorian serves as the IEEE Computer Society`s Vice President for Technical Activities and the Editor-in-Chief Emeritus of the IEEE Design & Test of Computers. He participates in editorial advisory boards of IEEE Spectrum, and JETTA. He chaired the Test Technology Technical Council of IEEE Computer Society, and founded IEEE P1500 Standard Working Group. He is a Golden Core Member of IEEE Computer Society, Honorary Doctor of National Academy of Sciences of Armenia, and a Fellow of the IEEE.
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