With VLSI chip transistors getting smaller and smaller, today’s digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation. Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance, along with the practical techniques used to create fault-tolerant systems.
Self-Checking and Fault-Tolerant Digital Design
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Bibliographic information
Title
Self-Checking and Fault-Tolerant Digital Design
Author
Edition
1st ed.
Publisher
ISBN
0124343708
Length
xii+216p., Figures; Tables; References; Appendices; Index; 24cm.
Subjects
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